1. Field of the Invention
The present invention relates to the field of packages for semiconductor devices and packaged devices, and more particularly, to the field of hermetic packages and hermetically packaged devices.
2. Prior Art
Power semiconductor devices have been packaged in a vast variety of package configurations. These include both hermetic (gas-tight) and non-hermetic (gas-permeable) packages. As the desired operating frequency of hermetically packaged power devices is increased, a number of problems with prior art packages become apparent. In general, prior art packages for power devices which are hermetically sealed include a metallic case or can. Such metallic cans have device leads which extend through glass seals in the sides or bottom of the can. The glass seals bond to both the lead and the can. The chip containing the device is bonded to the bottom of the can and the contact pads on the top of the device are connected to the through-the-can leads by wire bonds. After the completion of mounting and bonding the chip, a cover or lid is sealed on top of the can to hermetically seal the package.
Such packages present a number of disadvantages. First, since the wire bonds are normally made with round wire on the order of about 1 mil (0.025 mm) in diameter for low power integrated circuits and 30-40 mils (0.76-1.02 mm) in diameter for power or high current devices and are from about 0.3-0.5 inch (0.76-1.27 cm) long, they have a significant inductance in their own right. Second, the through-the-can leads are round wires about 20 to 50 mils (1-3 mm) in diameter and about 0.3-0.5 inch (0.76-1.27 cm) long. Thus, these leads also have a significant inductance in their own right. Third, the wires have a significant resistance which adds to the on-resistance of the device. Fourth, in order for the thermal coefficients of expansion of the can and the semiconductor device to be sufficiently equal that the device does not become de-bonded from the can and to prolong the life of the glass seals, the cans are normally made of Kovar.RTM., Invar.RTM., steel or other similar low thermal coefficient of expansion metals. Such metals are magnetic materials and consequently, have the effect of increasing the inductance of the wire bonds and of the through-the-can leads. Fifth, glass seals are unreliable over long periods of time and eventually begin to leak. Sixth, the metals used in the can and the leads suffer from higher electrical and thermal resistivity than copper. Seventh, such packages have the disadvantage that they are substantially larger in both major surface area and volume than the semiconductor chip and weigh many times what the chip weighs. The net result is that the final packaged chip is a heavy, bulky item which has a relatively high inductance. That relatively high inductance is undesirable for high frequency operation of the device because when coupled with the very high di/dt characteristic of high frequency operation, this inductance leads to very high di/dt voltage overshoots. This problem increases with increasing frequency of operation because inductive effects increase with increasing signal frequency.
As the complexity and power requirements of semiconductor systems have increased, an increasing need has developed for hybrid power circuits in which various semiconductor devices are interconnected to provide the overall system. Because of the relatively high weight and large size of hermetic packages for semiconductor chips, it has become a common practice in the semiconductor art to mount unpackaged chips on a substrate to form a hybrid circuit and then to enclose the entire substrate and the chips mounted thereon in a metallic hermetic package made of magnetic material in order to provide a hermetically sealed system. Such systems suffer from disadvantages similar to those which are suffered by individual chips packaged in hermetic packages. Further since unpackaged power chips cannot be tested at full current, some of the chips will not operate properly at full current. This has a substantial negative impact on the yield of hybrid circuits assembled from chips which have not been fully tested.
There is a need for a compact, hermetic, non-magnetic package for high frequency, high current power devices.